1. Field of the Invention
The present invention relates to a digital system. More particularly, aspects of the present invention relates to an apparatus and method for adaptively changing clock frequencies of a Central Processing Unit (CPU) and a bus in a digital system.
2. Description of the Related Art
Recently, a Dynamic Voltage and Frequency Scaling (DVFS) technology is being applied to Personal Computer (PC)-class Central Processing Units (CPUs) and some embedded processors. The DVFS technology measures or estimates an activity of a CPU and changes a clock frequency of the whole CPU or system.
However, the DVFS technology measures only operation information of a CPU itself and changes only a voltage and clock frequency of the CPU. As a result, a range of power reduction is restricted to the CPU. In addition, a function block requiring a bandwidth of an independent bus other than the CPU may be present, and, in this case, a problematic phenomenon occurs in which system performance is in fact reduced by the CPU-centered DVFS technology.